In the semiconductor industry, so-called “flip-chips” may be attached to a substrate, such as a printed circuit board (PCB) or another semiconductor die, through an array of conductive bumps, studs, columns or pillars, which may be characterized as conductive elements. A dielectric underfill material may fill a gap between the flip-chip and the substrate. Referring to FIGS. 1A through 2, in a so-called “wafer level underfill” (WLUF) method, an array of conductive elements 12 is formed on a surface of a semiconductor wafer 10 including multiple flip-chips, and dielectric WLUF material 30 is deposited on the surface of the semiconductor wafer 10 after the conductive elements 12 are formed. The WLUF material 30 may be spin-coated or laminated on the surface of the semiconductor wafer 10 with the array of conductive elements 12 formed thereon. In a so-called “overcoated” semiconductor wafer 10, the WLUF material 30 may have an average height that is greater than an average height of the conductive elements 12, as shown in FIG. 1A. In a so-called “undercoated” semiconductor wafer 10, the WLUF material 30 may have an average height that is less than an average height of the conductive elements 12, as shown in FIG. 1B. Regardless of whether the semiconductor wafer 10 is overcoated or undercoated, the WLUF material 30 covers the conductive elements 12 of the array, as shown in FIGS. 1A and 1B.
Referring to FIG. 2, after the WLUF material 30 is deposited over the semiconductor wafer 10, including over the conductive elements 12, the flip-chips of the semiconductor wafer 10 are singulated into individual flip-chips 11. Each flip-chip 11 is then positioned over a substrate 40, with the conductive elements 12 aligned with bond pads 42 of the substrate 40, and attached to the substrate 40, such as by using a thermal compression bonding process. The WLUF material 30 melts and flows responsive to the application of heat during the bonding process to fill the gap between the flip-chip 11 and the substrate 40, and the WLUF material 30 is cured. Ideally, the melted WLUF material 30 flows off of each conductive element 12 to enable an electrical connection to be made between the conductive elements 12 and the bond pads 42. However, a portion of the WLUF material 30 often does not flow off some of the conductive elements 12 and becomes entrapped between an end of a conductive element 12 and its corresponding bond pad 42, as shown in FIG. 2 at reference numeral 32. The entrapped WLUF material 32 may increase electrical resistance across the electrical connection or cause the electrical connection to fail. Even a small amount of entrapped WLUF material 32 may result in weakened bond joint integrity, which may result in early failure of the device. Such defects may lower the performance of a device including the flip-chip 11 and the substrate 40, or may even render the entire device useless. However, use of the WLUF method enables application of the underfill material to the entire semiconductor wafer 10, which saves time and cost of manufacturing over methods that provide underfill material in a gap under individual flip-chips.
In a so-called “capillary underfill” (CUF) method, the flip-chips are individually placed over the substrate such that the conductive elements are in contact with bond pads of the substrate, and a bond joint between the conductive elements and bond pads is established. Liquid, relatively low-viscosity dielectric underfill material is then introduced into a gap between the flip-chip and the substrate along one or more edges of the substrate and the flip-chip and is drawn into the gap by wetting of the substrate and flip-chip surfaces and capillary attraction. The CUF method enables the electrical connections between the conductive bumps or pillars of the flip-chip and the bond pads of the substrate to be free of underfill material, which improves the electrical connections and performance thereof. However, introducing the underfill material into the gaps individually increases the time and cost of manufacturing compared to the WLUF method. Furthermore, as flip-chips and their respective conductive bumps or pillars are reduced in size, according to the well-known trend in the semiconductor industry, it is becoming increasingly difficult to fill in the gap between the flip-chips and their associated substrates without the formation of voids in the underfill material. When present, voids in the underfill material may decrease the reliability, performance, and physical stability of devices formed with the flip-chips and their associated substrates.